Introducing SYZYGY

An open standard for high-performance peripheral connectivity. 

  • Low cost, compact, high-performance
    connectors
  • Pin count economizes available FPGA I/O
  • Low cost cable options
  • FREE to license

Applications

High Performance Prototypes

Rapid prototyping with off-the-shelf single-purpose peripherals.

System Integration and Testing

Build complex systems from smaller building blocks to iterate quickly and reduce cost. Create custom test systems for production functional testing.

Evaluation Systems

SYZYGY is a perfect platform for your next high-performance semiconductor evaluation board.

TYPICAL PERIPHERALS

Data Acquisition
Machine Vision
Digital Communications
Software- Defined Radio
Video Output
Multi-Channel I/O
Sensors
Robotics

Interface Comparison

SYZYGY fills the gap between low speed, low pin-count Digilent PMOD devices and high-performance, high pin-count VITA 57.1 FMC peripherals.

This chart shows SYZYGY, PMOD, and FMC standards as well as several model peripherals and where they fall on 
throughput-per-pin and pin count metrics.
Interface Pin Count MHz / Pin
MinMaxMinMax
PMOD48150
SYZYGY STD103250500
SYZYGY XCVR101850200
SYZYGY XCVR (gigabit pins)485005,000
FMC LPC207250500
FMC LPC (gigabit pins)245005,000
FMC HPC7220050500
FMC HPC (gigabit pins)10405005,000
Note: Yes, all of these standards can go down to DC and some can go higher than we have here. This data basically illustrates what we consider to be the "sweet spot" for the interface. Your mileage may vary.

SYZYGY Interface connectors

Standard Peripheral

40-pin 0.8mm Samtec connector
+5v, +3.3v fixed voltages
Programmable I/O voltage (Smart VIO)
28 single-ended signals (incl. 8 differential pairs)
Clock
MCU for Smart VIO and data

Transceiver Peripheral

60-pin 0.5mm Samtec connector
+5v, +3.3v fixed voltages
Programmable I/O voltage (Smart VIO)
16 single-ended signals
2 Tx and 2 Rx lanes Gigabit serial I/O
Transceiver reference clock
MCU for Smart VIO and data
© 2024 by Opal Kelly